Imprinting lithography using the liquid/solid transition of metals and their alloys

ABSTRACT

A method is provided for imprinting a pattern having nanoscale features from a mold into the patternable layer on a substrate. The method comprises: providing the mold; forming the patternable layer on the substrate; and imprinting the mold into the patternable layer, wherein the patternable layer comprises a metal or alloy having a transition temperature from its solid form to its liquid form that is within a range of at least 10° above room temperature.

TECHNICAL FIELD

The present invention is directed to imprinting lithography, involvingimprinting a mold into a mold-receiving layer at the nanoscale level,where the dimensions of critical features are measured in nanometers,and, more particularly, to the composition of the mold-receiving layerin which the mold pattern is imprinted.

BACKGROUND ART

It is advantageous to fabricate electronic circuits at the nanometerscale, because high density of circuit elements, high operating speed,and low process cost are realized. By “nanometer scale” is meant thatthe critical dimension of a feature is measured in nanometers. However,in nanoscale circuits, one major problem is how to fabricate nanoscalecircuits efficiently.

To solve this problem, effective, low-cost methods for fabricatingnanoscale circuits, employing imprinting lithography, have beendeveloped. The imprinting process is described, for example, in U.S.Pat. No. 6,432,740, entitled “Fabrication of Molecular ElectronicCircuit by Imprinting”, issued on Aug. 13, 2002, to Yong Chen, thecontents of which are incorporated herein by reference.

In the imprinting process, a mold with a protruding pattern is pressedinto a thin polymer film. The protruding pattern in the mold creates arecess in the thin polymer film, and thus the polymer replicates thepattern on the mold. The mold is then removed from the film. The filmthen is processed such that the polymer in the recess area is removed,thereby exposing the underlying substrate.

To avoid the interaction between polymer and mold, a release layer isusually coated on the mold before imprinting. The release layer isusually a self-assembled molecular layer, which can effectively reducethe interaction between the mold and the polymer. However, it is verydifficult to form a defect-free coating of the release layer on the moldsurface, and defects will also invariably be created during imprinting,especially when the pattern is close to 10 nm or less. These defectscause the polymer to stick to the mold.

It is also difficult to maintain a high aspect ratio between the heightand width of the polymer pattern due to the mechanical properties of thepolymer, and the lift-off and anisotropic etching processes become verydifficult or impossible when the polymer pattern is very thin.

Thus, there is a need for a method of replicating the pattern of themold in the metal/semiconductor layer that retains most, if not all, ofthe advantages of the prior art process, while overcoming theafore-mentioned problems.

DISCLOSURE OF INVENTION

In accordance with the embodiments disclosed herein, a method isprovided for imprinting a pattern having nanoscale features from a moldinto the patternable layer on a substrate. The method comprises:

providing the mold;

forming the patternable layer on the substrate; and

imprinting the mold into the patternable layer,

wherein the patternable layer comprises a metal or alloy having atransition temperature from its solid form to its liquid form that iswithin a range of at least 10° above room temperature.

In another embodiment, the method comprises

providing the mold;

forming the patternable layer on the substrate, wherein the patternablelayer comprises a metal or alloy having a transition temperature fromits solid form to its liquid form that is at least 10° C. above roomtemperature;

heating the patternable layer to its liquid state;

imprinting the mold into the patternable layer;

cooling the patternable layer to its solid state; and

removing the mold from the patternable layer, leaving a negative copy ofthe pattern imprinted in the patternable layer.

In yet another embodiment, a masking layer is provided for use informing a pattern having nanoscale features on the substrate with themold. The masking layer comprises the patternable layer formed on thesubstrate. The patternable layer comprises the metal or alloy describedabove.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a perspective view, depicting a prior art imprinting process;

FIG. 2 a-2 b, in side elevational view, depict a conventional processfor forming a patterned metal layer on a substrate;

FIGS. 3 a-3 c, in side elevational view, depict another conventionalprocess for forming a patterned metal on a substrate;

FIGS. 4 a-4 e, on coordinates of composition and temperature, are knownbinary phase diagrams of (a) Ga—In, (b) Ga—Sn, (c) In—Sn, (d) Si—Sn, and(e) Si—O;

FIGS. 5 a-5 f, in perspective view, depict an embodiment of the methodfor imprinting, using a metal (or metal alloy) as the release agent; and

FIG. 6 is a flow chart, depicting an embodiment of the imprintingmethod.

BEST MODES FOR CARRYING OUT THE INVENTION

Reference is made now in detail to specific embodiments, whichillustrates the best mode presently contemplated by the inventor forpracticing the various embodiments. Alternative embodiments are alsobriefly described as applicable.

FIG. 1 is a perspective view, illustrating the imprinting process for alift-off implementation, wherein a mold 10 with a protruding pattern 10a has been pressed into a thin polymer film 12. The polymer film 12 issupported on a substrate 14.

The protruding pattern 10a in the mold 10 creates a corresponding recess12 a in the thin polymer film 12 during pressing, so the polymer filmacquires the reverse of the pattern on the mold. After the mold 10 isremoved, the polymer film 12 is processed such that any polymerremaining in the recess area 12 a is removed (in the case that theprotrusions 10 a did not fully contact the surface of the substrate 14),exposing corresponding portions of the underlying substrate 14. In thelift-off implementation here illustrated, a conductive thin film isdeposited from the top direction, and the polymer portion 12 b isdissolved in solvent, thereby removing the conductor deposited on thetop of the polymer along with the polymer. Thus, only the conductorremaining in the recesses 12 a will remain, thereby creating the desiredpattern, e.g., conducting wires (not shown).

With further processing, the polymer pattern can be transferred to ametal/semiconductor pattern on the substrate by conventional lift-offand anisotropic etching methods (FIGS. 2 and 3). In these processes, thepolymer is used as media to replicate the pattern in the mold, and asmask for etching or lift-off.

FIGS. 2 a-2 b and FIGS. 3 a-3 c are side elevational views, depictingtwo prior approaches to the well known lift-off process. In FIG. 2 a,the patternable polymer layer 12 is formed on the substrate 14. Thepatternable polymer layer 12 is patterned, as described above, to formopenings 12 a, one of which is shown in FIG. 2 a, that expose thesurface 14 a of the underlying substrate 14. A metal layer 16 isblanket-deposited everywhere, including on top of the polymer layer 12and on the exposed portions of the surface 14 a. The polymer layer 14 isthen removed, such as by etching or dissolution, taking with it thethose portions of the metal layer 16 on top of the polymer layer,leaving those portions of the metal layer on the exposed portions of thesurface 14 a, as shown in FIG. 2 b.

In FIG. 3 a, the metal layer 16 is deposited on the surface 14 a of thesubstrate. In this approach, the patternable polymer layer 12 isdeposited everywhere on the metal layer 16. The patternable polymerlayer 12 is then patterned, as described above, leaving portions of thepolymer layer covering portions of the underlying metal layer 16, asshown in FIG. 3 a. The exposed portions of the metal layer 16 are thenremoved, such as by etching, leaving the structure depicted in FIG. 3 b.Finally, the remaining polymer portions 12 are removed, such as byetching or dissolution, leaving portions of the metal layer 16 on thesurface 14 a of the substrate 14, as shown in FIG. 3 c.

It will be seen that while the two processes described above aredifferent, the final result, depicted in FIGS. 2 a and 3 c, is the same,namely, patterned metal portions 16 on substrate 14.

When the patterns 10 a get close to 10 nm or sub-10 nm scale, however,it is difficult to avoid preventing the polymer 12 from reacting withthe mold 10. Therefore, the polymer will stick to the mold, whichprevents accurate replication of the pattern in the polymer from themold.

In accordance with the teachings herein, the transformation between theliquid state and the solid state of metals and alloys is used as thepatternable layer in place of the prior art polymer layer. In manyinstances, the patternable layer disclosed herein also serves as themold release. Specifically, a method is provided for imprinting apattern having nanoscale features from a mold into a layer on asubstrate. The method comprises:

providing the mold;

forming the patternable layer on the substrate; and

imprinting the mold into the patternable layer,

wherein the patternable layer comprises a metal or alloy having atransition temperature from its solid form to its liquid form that is atleast 10° C. above room temperature. As used herein, “room temperature”is defined as being about 20° C.

Referring now to FIGS. 5 and 6, as shown in FIG. 5 a, the substrate 14is coated with a layer 18 of a metal or metal alloy (“metal/alloy”)(step 60 in FIG. 6). The metal/alloy layer 18 may comprise any metal ormetal alloy having a solid-to-liquid transition temperature of at least10° C. above room temperature. Preferably, the solid-to-liquidtransition temperature is in the range of about 50° to 500° C.

Selection of the composition of the metal/alloy layer 18 is based on itsmelting point. Preferably, compositions having melting points close to,but somewhat above, room temperature are selected for the imprintingmethod, since it is easy to perform the imprinting at such mild elevatedtemperatures and it offers less possibility of damage to other materialsor devices during the process. Examples of metals and metal alloyssuitably employed in the practice of the embodiments include, but arenot limited to, gallium, indium, and tin and their alloys, preferablytheir binary alloys.

If necessary, an optional adhesive/reactive layer 20 for the metal/alloyis first deposited on the substrate 14 (step 62), followed by depositionof the metal/alloy layer 18 thereon. Such an optional adhesive/reactivelayer 20 serves to enhance the adhesivity between the metal/alloy layer18 and the substrate 14. Examples of such an optional adhesive/reactivelayer include, but are not limited to, titanium, chromium, aluminum,platinum, and palladium. The selection of a particular material dependson the composition of the material comprising the mold 10, and oneskilled in the art would know which adhesive material to select. As anexample, where the mold 10 comprises silicon, silicon dioxide, siliconnitride, sapphire, etc., any of the foregoing listed metals could beused as the optional adhesive/reactive layer 20.

The deposition of the metal/alloy layer 18 (and the optionaladhesive/reactive layer 20) is performed using conventional proceduresthat do not form a part of the embodiments disclosed herein. Examples ofsuch conventional procedures, include, but are not limited to, thermalevaporation and electron-beam evaporation.

The metal/alloy layer 18 is deposited to a thickness within a range ofabout 1 nanometer (nm) to 1 micrometer (μm), and preferably is within arange of about 1 to 100 nm. The thickness of the optionaladhesive/reactive layer 20 is typically less than 5 nm.

The substrate 14 and metal/alloy layer 18 are next heated to transformthe metal/alloy to liquid form, and the mold 10 with protruding pattern10 a is impressed toward the substrate (step 64). The liquid metal/alloylayer 18 copies the mold pattern 10 a, and the substrate 14 andmetal/alloy layer 18 are cooled down to transform the metal/alloy layerback to the solid state, as shown in FIG. 5 b.

The mold 10 is removed from the metal/alloy layer 18 (FIG. 5 c), leavingrecessed portions 18 a in the metal/alloy layer (step 66).

The residual metal/alloy 18 in the bottom of the recessed, or trough,areas 18 a is removed, such as by anisotropic reactive ion etching orchemical etching, as shown in FIG. 5 d (step 68).

A metal or semiconductor layer 22 is next blanket-deposited everywhere,including in the recessed areas 18 a, as shown in FIG. 5 e (step 70).The composition of the metal or semiconductor layer 22 is different thanthat of the metal/alloy layer 18. For example, the metal may compriseplatinum, palladium, gold, or silver, while the semiconductor maycomprise silicon or germanium. The thickness of layer 22 is less thanthat of layer 18, so the further pattern transfer process will bepossible, as discussed below. The thickness range of layer 22 is thesame as that of layer 18.

Lift-off is then performed, removing the metal/alloy layer 18 and theportions of the metal/semiconductor layer 22, leaving behind theportions of the metal/semiconductor layer directly on the substrate 14,as shown in FIG. 5 f (step 72). Either chemical (wet) etching, such aswith an appropriate acid, or reactive ion etching (RIE) may beconveniently used, although any etching technique that performsdifferential etching between metal/alloy layer 18 andmetal/semiconductor layer 22 may be employed.

Alternatively, the metal/alloy layer 18 can also be used as an etchingmask layer without lift-off, which has not been described in detailhere.

It is also necessary to choose the composition of the metal/alloy layer18 such that it is not reactive with the mold 10 but nonetheless adheresto the substrate 14, and permits facile detachment of the mold from themetal/alloy layer after the embossing step. For example, In, Ga, and Snhave melting points of 156.6° C., 29.8° C., and 232° C., respectively,and their alloys have even lower melting points, as shown in FIGS. 4 a(Ga—In), 4 b (Ga—Sn), and 4 c (In—Sn), which are prior art binary phasediagrams. Thus, referring to the melting point of a metal or thesolid-liquid transition of a metal alloy, whether binary or higher, isall that is required to select an appropriate metal or metal alloywithin the teachings above.

Based on the foregoing, it is easy to move between the solid phase andthe liquid phase during the foregoing imprinting process by heating andcooling. If the molds are made of Si/SiO₂ materials, then In and Ga andtheir Sn alloys cannot react with Si at the melting point of the alloy.For example, FIG. 4 d depicts the prior art binary phase diagram of theSi—Sn system. It will be seen that the solid-liquid transition isconsiderably above 500° C., except for a Sn-rich portion (>99% Sn). Thebinary phase diagrams for Si—Ga and Si—In are similar. Thus, due to thenon-reactivity of the metal/alloy layer 18 and the mold 10, the moldshould release easily from the metal/alloy layer when it is cooled toits solid phase.

For other kinds of molds, the mold surface can be coated with somenon-reactive material, such as a metal, ceramic, or oxide that does notreact with the composition of the metal/alloy layer 18, as describedabove. For example, if In and Ga and their alloys are used forimprinting, Pt, Pd, and Cr can be used as metals to coat the mold 10 tofacilitate the release.

On the other hand, the substrate 14 can be coated with a suitable metalor oxide layer to enhance the adhesion of the metal/alloy layer 18 forimprinting. For example, if SiO₂-coated Si is used as substrate 14, andIn or Ga or their alloys is used as the imprinting metal/alloy layer 18,then a layer of Sn can be coated on a SiO₂/Si substrate. The Sn canreact with SiO₂/Si and be adhered to SiO₂/Si substrate; FIGS. 4 d and 4e depict the binary phase diagrams for Si—Sn and Si—O alloys. The In andGa imprinting metals/alloys layer 24 can also react with Sn to form analloy; as shown in the above-mentioned binary phase diagrams for In—Sn(FIG. 4 c) and Ga—Sn (FIG. 4 b), therefore enhancing the adhesionbetween the imprinting metal/alloy layer 24 and substrate 14.

It will be appreciated that pure Sn can react with the SiO₂/Sisubstrate, but that Sn alloys, such as Ga—Sn and In—Sn will not.

During the lift-off patterning process, the imprinting metal/alloy layer18 can be either selectively etched away by chemical methods or heatedabove its melting point and then removed mechanically.

The metals and alloys will have several advantages over the previous useof polymers for the imprinting process:

(a) The sticking problem between molds and alloy is avoided.

(b) The melting points of the metals and their alloys can be wellcontrolled and adjusted, using phase diagram data.

(c) The solid and liquid phases of metals and alloys can be utilized toadvantage, unlike the polymers, which are usually transformed betweensolid and glassy states. The low viscosity of the metal/alloy liquidspermits accurately coping the molds.

(d) The metals and alloys have a much lower molecular weight than thepolymer; therefore, they can deform and copy significant smallerpatterns than the polymers.

(e) The thickness of the metal/alloy layer 18 can be controlledaccurately during the coating process, and the thicknesses of themetal/alloy are very homogeneous over the whole wafer or substrate 14.

(f) The disclosed method is suitable for fabricating high-densitynanoscale circuits. By “high density” is meant that the edge-to-edgespacing is considerably less than 100 nm, and even less than 10 nm.

(g) The manufacturing process is simplified by avoiding the relief layerand defects generated during the imprinting processes using polymers.

INDUSTRIAL APPLICABILITY

The use of metals and metal alloys in nanoscale imprinting is expectedto find use in a variety of imprinting applications.

1-19. (canceled)
 20. A masking layer for use in forming a pattern having nanoscale features on a substrate with a mold, said masking layer comprising a patternable layer formed on said substrate, wherein said patternable layer comprises a metal or alloy having a transition temperature from its solid form to its liquid form that is at least 10° C. above room temperature.
 21. The masking layer of claim 20 wherein said transition temperature is at least 50° C.
 22. The masking layer of claim 20 wherein said transition temperature is less than 500° C.
 23. The masking layer of claim 20 wherein said patternable layer comprises a metal selected from the group consisting of gallium, indium, and tin and their alloys.
 24. The masking layer of claim 23 wherein said alloy comprises a binary alloy of two of said metals.
 25. The masking layer of claim 20 wherein said mold comprises a material selected from the group consisting of silicon, silicon dioxide, silicon nitride, and sapphire.
 26. The masking layer of claim 20 wherein said substrate comprises a material selected from the group consisting of silicon, silicon dioxide, silicon nitride, and sapphire.
 27. The masking layer of claim 20 further comprising an adhesive/reactive layer formed on said substrate and said metal or metal alloy formed on said adhesive/reactive layer.
 28. The masking layer of claim 27 wherein said adhesive/reactive layer comprises a metal selected from the group consisting of titanium, chromium, platinum, and palladium. 